Supply-chain intelligence · directional estimates
Memory supply chain
A detailed map of DRAM, NAND, HBM and advanced packaging from silicon, process equipment and materials through memory modules, SSDs, AI servers and cloud demand—with directional revenue and cost waterfalls.
How to read this: percentages are analyst estimates for a representative AI/data-center dollar, not reported segment disclosures. They are intended to map economic exposure and flow-through, not to forecast any single company with precision. Hardware mix, integration, geography, inventory timing and customer concentration can move the ranges materially.
1. Executive map: the memory value chain
InputsSilicon wafers, gases, chemicals, photoresist, deposition materials
~10–16% of wafer cost
~10–16% of wafer cost
Wafer fabricationDRAM, NAND, HBM, controller dies; cleanroom + process tools
~45–60% of cost
~45–60% of cost
Advanced packageTSV, interposer, stacking, bonding, substrate, thermal
~15–30%
~15–30%
Module / testDIMMs, SSDs, HBM stacks, validation, burn-in
~8–18%
~8–18%
System demandAI accelerators, servers, PCs, phones, autos, storage
ASP × bits × content
ASP × bits × content
~75–85%
DRAM + NAND revenue concentrated among the top three suppliers
2–4×
HBM premium versus conventional DRAM on a bit-equivalent basis
~40–60%
HBM package cost that can sit outside the memory die itself
High
Cyclicality: bit supply and inventory often overwhelm unit demand
2. Layer-by-layer supply chain and economics
| Layer | What is supplied | Representative players / exposure | Revenue / cost share | Margin & bottleneck logic | Flow-through signal |
|---|---|---|---|---|---|
| Silicon & materials | 300mm wafers, polysilicon, photoresist, CMP slurry/pads, specialty gases, metals | Shin-Etsu, SUMCO, GlobalWafers, Siltronic, Entegris, Merck, Linde, Air Liquide | 10–16% of wafer cost; usually 5–10% of end memory revenue | High purity and qualification create stickiness; materials are a smaller but essential dollar pool. | Inputs wafer starts, chemical usage, substrate pricing |
| Process equipment | Lithography, etch, deposition, clean, CMP, metrology, inspection, implant | ASML, Applied Materials, Lam Research, Tokyo Electron, KLA, ASM, SCREEN | Capex, not direct memory COGS; roughly 15–25% of long-run cost of ownership | Tool vendors earn high gross margins; memory capex cycles create violent order volatility. | Capex lead WFE orders, fab announcements, utilization |
| Memory wafer manufacturing | DRAM cells, 3D NAND layers, peripheral logic, redundancy, wafer sort | Samsung, SK hynix, Micron; CXMT and YMTC in China | 45–60% of DRAM/NAND cost; 50–70% of die value | Scale, node, yield, layer count and utilization determine cost/bit. Fixed costs make downturn margins collapse. | Bits / wafer node transitions, layer count, yield, utilization |
| HBM / advanced packaging | TSV drilling/fill, wafer thinning, die stacking, hybrid/thermal compression bonding, interposer | SK hynix, Samsung, Micron; TSMC and ASE/Amkor ecosystem | 15–30% of HBM cost; can be 25–45% of HBM revenue content | Packaging yield and thermal performance—not just DRAM bits—set supply. HBM is capacity constrained. | Yield / stack HBM stack output, bonding tools, interposer capacity |
| Substrates & interposers | ABF substrates, silicon interposers, organic carriers, thermal lids, underfill | Ibiden, Shinko, Unimicron, Ajinomoto materials, TSMC, Samsung Electro-Mechanics | 8–18% of advanced-package cost | Large-body substrates and warpage control are bottlenecks; qualification and lead time matter. | Packaging substrate starts, ABF supply, package size |
| Controllers & firmware | SSD controllers, DRAM PMICs, ECC, NAND controllers, firmware and reference designs | Marvell, Silicon Motion, Phison, Monolithic Power, Rambus; captive logic at IDMs | 5–15% of module revenue; higher in enterprise SSDs | Controller silicon and firmware add differentiation; NAND makers may bundle or vertically integrate. | Mix enterprise SSD mix, controller ASP, PCIe generation |
| Modules & test | RDIMM/MRDIMM, SSDs, HBM validation, burn-in, final test, qualification | Kingston, SMART Global, Sanmina, Jabil, Micron/SK hynix/Samsung captive operations | 8–18% of module revenue | Test time, binning and reliability determine usable output. Enterprise qualification extends cycles. | Binning yields, test capacity, qualification backlog |
| OEM / cloud system | AI servers, general servers, PCs, phones, networking, autos and industrial systems | Nvidia, AMD, Google, Microsoft, Amazon, Meta, Dell, HPE, Lenovo, Apple | Memory content typically 5–20% of system BOM; AI systems can be materially higher | End demand is not enough: customers can destock, change configurations or shift from capacity to HBM. | Content GB/server, HBM per accelerator, SSD TB/system |
3. Revenue and cost waterfalls by product
| Product | Revenue split (indicative) | Cost split (indicative) |
|---|---|---|
| Commodity DRAM | Die 72–82%; test/package 8–15%; overhead/profit 8–18% | Fab depreciation 25–35%; wafer process 35–45%; materials 10–15%; test/package 8–12%; other 8–15% |
| NAND / SSD | NAND 45–65%; controller 8–15%; package/module 12–22%; brand/channel/profit 10–25% | Wafer fab 45–60%; controller 8–15%; package/test 10–18%; BOM/firmware/channel 12–22% |
| HBM stack | DRAM dies 45–60%; advanced package 20–35%; test/binning 8–15%; margin 10–25% | DRAM wafer 40–55%; TSV/thinning/stack 15–25%; interposer/substrate 10–20%; test/thermal 8–15%; other 8–15% |
| Enterprise AI server | GPU/accelerator 45–60%; memory 10–20%; networking 8–15%; CPU/storage/other 15–25% | Similar BOM shape, but integration, software, warranty and channel determine system gross margin. |
These are economic ranges, not accounting segment margins. A memory maker's reported revenue can include captive packaging, while an equipment vendor sees only capex.
4. DRAM, NAND and HBM are different cycles
- DRAM: bit demand follows servers, PCs and mobile; node shrink lowers cost/bit but requires large capex.
- NAND: layer count and controller content matter; client SSD weakness can coexist with enterprise SSD strength.
- HBM: demand is accelerator-led and supply is package/yield constrained. It carries a premium but requires more process steps and test.
- Memory equipment: orders lead wafer output by quarters; a fab announcement is not immediate bit supply.
- Materials: lower dollar content but high operational leverage when utilization rises across the installed base.
5. Investor flow-through framework
| Signal | Likely beneficiary | Why it matters | Common false read |
|---|---|---|---|
| HBM GB per accelerator rises | SK hynix, Micron, Samsung; advanced packaging | More memory dollars per GPU/system; premium mix | Assuming all HBM demand converts to wafer revenue immediately—packaging yield can bottleneck |
| DRAM/NAND prices rise | Memory manufacturers first; equipment later | Operating leverage is high after utilization recovers | Confusing price recovery with sustainable bit demand |
| Hyperscaler capex rises | Accelerator, HBM, networking, SSD and power chain | Cluster build drives content per rack | Capex dollars do not all become memory dollars |
| WFE capex rises | ASML, Lam, Applied, TEL, KLA and materials | Leading indicator for future capacity | Overlooking utilization and inventory before new tools ship |
6. Risks and caveats
Memory is one of the most operating-levered semiconductor chains: a small change in price, utilization or yield can dominate the income statement. The cleanest flow-through analysis separates bits shipped, price per bit, product mix, yield and capex depreciation. HBM creates a structurally richer product but also shifts bottlenecks into stacking, substrates, thermal design and customer qualification.
Reference set: annual reports and earnings materials from Samsung Electronics, SK hynix, Micron, Kioxia, Western Digital / SanDisk, ASML, Applied Materials, Lam Research, Tokyo Electron, KLA, TSMC, ASE and major cloud/OEM customers; JEDEC and semiconductor industry roadmaps.
3. Named company-to-company network — memory
This network includes upstream suppliers, IDMs, OSATs, substrate makers, controllers, module makers, system OEMs and hyperscalers. Public companies frequently disclose end-market exposure but not every bilateral customer; confidence is labeled accordingly.
| Company | Buys from | Sells to | Product / role | Economic flow-through | Evidence |
|---|---|---|---|---|---|
| Shin-Etsu Chemical | Polysilicon, quartz, chemicals | Samsung, SK hynix, Micron, foundries | 300mm silicon wafers | Wafer starts × price; qualified capacity is sticky | High |
| SUMCO | Polysilicon, quartz, chemicals | Samsung, SK hynix, Micron, foundries | Silicon wafers | Utilization and wafer pricing lead memory bit output | High |
| GlobalWafers | Silicon feedstock and equipment | Memory and logic fabs | Silicon wafers | Materials content is small but capacity-critical | High |
| Entegris | Specialty chemicals, polymers, filtration inputs | Samsung, Micron, SK hynix, TSMC | Contamination control, carriers, materials | Fab starts and node complexity expand content | High |
| Merck KGaA | Chemicals and gases | Memory and logic fabs | Photoresist, deposition and process chemicals | Node transitions increase chemical intensity | High |
| Linde | Industrial gases and equipment | Samsung, SK hynix, Micron, fabs | Bulk/specialty gases | Fab utilization is direct recurring demand | High |
| Air Liquide | Gases, plants, distribution | Memory and logic fabs | Industrial and electronic gases | Long-term on-site contracts; fab buildout signal | High |
| ASML | Zeiss optics, components, electronics | Samsung, SK hynix, Micron, TSMC, Intel | Lithography systems | Capex lead indicator; EUV/DUV tools enable node transitions | High |
| Carl Zeiss SMT | Specialty glass, precision mechanics | ASML | Lithography optics | ASML bottleneck flows into tool delivery | High |
| Applied Materials | Components, lasers, precision parts | Samsung, SK hynix, Micron and foundries | Deposition, etch, implant, packaging tools | WFE capex × tool intensity; high operating leverage | High |
| Lam Research | Components, precision parts, gases | Samsung, SK hynix, Micron, NAND makers | Etch and deposition tools | 3D NAND layers and DRAM complexity add steps | High |
| Tokyo Electron | Precision parts, chemicals, electronics | Memory and logic fabs | Coat/develop, etch, deposition, clean | Node and layer count expand process steps | High |
| KLA | Optics, sensors, electronics | Samsung, SK hynix, Micron, foundries | Inspection and metrology | Yield investment rises with leading-edge complexity | High |
| ASM International | Components, ceramics, electronics | Memory and logic fabs | Atomic layer deposition / epitaxy | Advanced nodes and HBM-related logic add demand | High |
| SCREEN | Precision equipment, chemicals, components | Memory fabs and foundries | Wafer cleaning and coating | More layers/steps increase clean intensity | High |
| Micron | Wafers, gases, chemicals, ASML/Applied/Lam/TEL tools | Nvidia, AMD, Dell, HPE, module makers, cloud OEMs | DRAM, NAND, HBM and modules | Bits × ASP × mix; HBM adds package yield and premium | High |
| SK hynix | Wafers, equipment, chemicals, TSMC/OSAT ecosystem | Nvidia, AMD, server OEMs, cloud buyers | DRAM, NAND, HBM | HBM stack allocation and qualification drive premium flow-through | High |
| Samsung Electronics | Wafers, equipment, chemicals, package inputs | Nvidia, OEMs, cloud, mobile and server makers | DRAM, NAND, HBM, logic and modules | Vertically integrated; mix across memory and logic obscures pure flow | High |
| CXMT | Wafers, memory equipment, chemicals | Chinese OEMs and module makers | DRAM | Domestic capacity can affect regional pricing and imports | Medium |
| YMTC | Wafers, equipment, chemicals, controllers | Chinese SSD and device OEMs | 3D NAND | Layer ramp and export controls affect supply | Medium |
| Kioxia | Wafers, equipment, materials, SanDisk partnership | SSD, smartphone, cloud and OEM channels | NAND flash | Joint-fab output × NAND pricing; enterprise mix matters | High |
| SanDisk | NAND from Kioxia ecosystem, controllers, packaging | PC, enterprise, retail and cloud storage | SSDs and flash products | NAND input cost dominates; brand/channel capture value | High |
| Western Digital | NAND ecosystem, controllers, components | Enterprise, PC, cloud and storage OEMs | SSDs/HDDs and storage systems | NAND cycle flows through product mix | High |
| TSMC | Wafers, ASML/Applied/Lam/TEL tools, chemicals | Nvidia, AMD, Broadcom, Marvell, Apple; package customers | Logic dies, interposers, advanced packaging | AI logic and HBM-adjacent CoWoS capacity constrain systems | High |
| ASE Technology | Substrates, chemicals, packaging equipment | Memory makers, fabless semis, OEMs | Assembly, test, advanced packaging | Test/packaging volume × complexity; HBM yield important | High |
| Amkor | Substrates, equipment, materials | Micron, fabless semis, AMD and system OEMs | Packaging and test | Advanced package capacity can gate accelerator/memory shipments | High |
| JCET | Substrates, materials, packaging tools | Memory and fabless customers | OSAT packaging and test | China capacity and customer qualification flow | Medium |
| Ibiden | ABF resin, copper, glass cloth, equipment | TSMC, Nvidia ecosystem, server/AI OEMs | ABF substrates | Large package and warpage requirements raise content | High |
| Unimicron | ABF materials, copper, laminates | Chip/package houses and OEMs | IC substrates | Package size and layer count drive ASP | High |
| Shinko Electric | ABF, copper, glass, equipment | Intel, memory and advanced package customers | IC substrates and package components | Advanced package capacity and yield | High |
| Ajinomoto | Amino acids and chemicals | Ibiden, Unimicron and substrate makers | ABF film (Ajinomoto Build-up Film) | Small revenue pool, high qualification/near-monopoly exposure | High |
| Rambus | Foundry wafers, IP development | Memory makers, controllers, system OEMs | Memory interface IP and chips | Royalty/licensing flow rises with bandwidth and standards | High |
| Marvell | TSMC, packaging, EDA | Cloud OEMs and storage vendors | Storage controllers, interconnect and custom silicon | Enterprise SSD and CXL content per system | High |
| Silicon Motion | Foundry wafers, firmware, packaging | SSD brands, module makers, NAND vendors | NAND controllers | Controller ASP and client/enterprise mix | High |
| Phison | Foundry wafers, firmware, DRAM/cache, packaging | SSD brands, industrial and enterprise OEMs | NAND controllers and turnkey SSD platforms | Controller + firmware captures module value | High |
| Monolithic Power Systems | Foundry wafers, passive components | Micron, SK hynix, Samsung, GPU/AI system OEMs | PMICs and power management | Higher memory bandwidth increases power content | High |
| SMART Global | DRAM/NAND from Micron/SK hynix/Samsung, controllers | Enterprise, cloud, OEM and industrial customers | Memory modules and storage solutions | Module revenue follows memory pricing; inventory risk high | High |
| Kingston | DRAM/NAND, controllers, PCBs | PC, server, consumer and enterprise channels | DIMMs and SSDs | Channel inventory and spot pricing determine flow | High |
| Dell | Nvidia/AMD, HBM, DRAM, SSDs, ODM assemblies | Enterprise, cloud, government and AI buyers | Servers and storage systems | Memory content is system BOM and configuration lever | High |
| HPE | Nvidia/AMD, memory, SSDs, ODM assemblies | Enterprise, cloud and government | Servers, storage and networking | Enterprise qualification and service attach change margin | High |
| Lenovo | Memory, processors, SSDs, ODM components | PC, server and enterprise customers | PCs and servers | PC/server unit demand × GB per system | High |
| Supermicro | Nvidia/AMD, Micron/SK hynix/Samsung, boards | Cloud, enterprise and AI infrastructure buyers | AI servers and racks | HBM/GPU configuration flows through system ASP | High |
| Wiwynn | Memory, processors, GPUs, boards, SSDs | Meta, Microsoft, Google and cloud customers | Cloud servers and racks | Direct hyperscale build exposure, lower-margin integration | High |
| Quanta | Memory, processors, GPUs, PCBs, SSDs | Hyperscalers and OEMs | Server and AI ODM | Rack volume × memory content | High |
| Wistron | Memory, processors, boards and storage | Cloud OEMs and enterprise customers | Server/AI manufacturing | Utilization and customer programs drive revenue | High |
| Nvidia | TSMC logic, HBM from SK hynix/Micron/Samsung, packaging | Dell, Supermicro, HPE, AWS, Meta, Microsoft, Google | AI accelerators and systems | HBM is a major accelerator BOM/content driver | High |
| AMD | TSMC logic, HBM, packaging and substrates | Cloud, OEMs, server customers | AI accelerators and CPUs | HBM per accelerator and package capacity drive system flow | High |
| AWS | Nvidia/AMD, HBM, servers, memory, storage | Businesses and developers | Cloud AI infrastructure | Capex is demand trigger; utilization is return driver | High |
| Microsoft | Nvidia/AMD, servers, HBM, SSDs, networking | Azure customers | Cloud AI infrastructure | AI cluster deployment drives memory content | High |
| Meta | Nvidia/AMD, servers, memory, networking | Users and advertisers | AI and hyperscale infrastructure | Large training/inference clusters create HBM and DRAM demand | High |
| TPU/ASIC supply chain, HBM, DRAM, servers | Cloud and products | AI clusters and cloud | Custom accelerators change HBM sourcing and system mix | High | |
| Apple | Samsung/Micron/Kioxia memory, TSMC logic, packaging | Consumers via iPhone/Mac/iPad | Devices | Large unit scale; memory content per device is key | High |
End-to-end transaction chains
HBM AI chain:
ASML / Applied Materials / Lam / TEL / KLA → SK hynix / Micron / Samsung (DRAM wafers) → TSV/thinning/stacking + TSMC/ASE/Amkor packaging → Nvidia/AMD accelerator packages → Supermicro/Dell/HPE/Quanta/Wiwynn servers → AWS/Microsoft/Meta/Google.
ASML / Applied Materials / Lam / TEL / KLA → SK hynix / Micron / Samsung (DRAM wafers) → TSV/thinning/stacking + TSMC/ASE/Amkor packaging → Nvidia/AMD accelerator packages → Supermicro/Dell/HPE/Quanta/Wiwynn servers → AWS/Microsoft/Meta/Google.
NAND SSD chain:
ASML / Lam / TEL / KLA + Shin-Etsu/SUMCO/Entegris → Kioxia/SanDisk/Western Digital/YMTC NAND wafers → Silicon Motion/Phison/Marvell controllers → Kingston/SMART/SSD brands → Dell/HPE/Lenovo/cloud storage → enterprise customers.
ASML / Lam / TEL / KLA + Shin-Etsu/SUMCO/Entegris → Kioxia/SanDisk/Western Digital/YMTC NAND wafers → Silicon Motion/Phison/Marvell controllers → Kingston/SMART/SSD brands → Dell/HPE/Lenovo/cloud storage → enterprise customers.
Substrate bottleneck chain:
Ajinomoto ABF → Ibiden/Unimicron/Shinko → TSMC/ASE/Amkor advanced package → Nvidia/AMD → AI server ODMs. Substrate and package yield can prevent a memory die from becoming a sellable HBM stack.
Ajinomoto ABF → Ibiden/Unimicron/Shinko → TSMC/ASE/Amkor advanced package → Nvidia/AMD → AI server ODMs. Substrate and package yield can prevent a memory die from becoming a sellable HBM stack.
Capex-to-bits chain:
Hyperscaler AI capex → Nvidia/AMD and server ODM orders → HBM/DRAM demand → Micron/SK hynix/Samsung capex → ASML/Applied/Lam/TEL/KLA + wafers/chemicals → future bit supply. The lag means equipment revenue leads memory revenue, while oversupply later reverses the chain.
Hyperscaler AI capex → Nvidia/AMD and server ODM orders → HBM/DRAM demand → Micron/SK hynix/Samsung capex → ASML/Applied/Lam/TEL/KLA + wafers/chemicals → future bit supply. The lag means equipment revenue leads memory revenue, while oversupply later reverses the chain.
Prepared by Singularity Research · Estimates reflect public filings, industry structure and best judgement. Percentages may not sum perfectly because of rounding and channel overlap.