Chip Testing & Burn-in

Bigger dies, more chiplets and HBM stacks multiply test time. SoC and memory testers become a quiet throughput gate for every accelerator shipped.

Wafer probe→Final test→Burn-in→Ship

Tightness score ⓘ

#22 of 56

▲ Tightening

Supply concentration4

Lead time3

Capex intensity3

Geopolitical exposure3

Pricing power4

Lead time

6–12 mo

Theme 1M

−23.3%

% in uptrend

Metric to watch

Advantest and Teradyne SoC-test orders, test time per device, and burn-in commentary.

What would prove us wrong

Weakens if tester lead times shorten while accelerator unit volumes rise.

Dependencies

Equal-weight · rebased 100 · 1Y

Stocks we track

Who controls this bottleneck

Roles, not recommendations. Delayed prices; local currency.

Stock	Role	Listing	Last	1D	1M	3M	YTD	Off 52w high	Next earnings
6857.T Advantest	SoC and memory testers for AI accelerators and HBM	TSE Japan	¥31,070	−3.93%	−6.0%	+5.0%	+58.5%	−25.8%	2026-10-28
TER Teradyne	SoC test plus Universal Robots cobots	NASDAQ US	$315.4	+2.11%	−20.8%	−1.6%	+63.1%	−34.8%	2026-10-27
FORM FormFactor	Probe cards incl. HBM wafer probe	NASDAQ US	$103.1	+4.66%	−20.5%	+16.9%	+84.8%	−35.5%	2026-10-28
AEHR Aehr Test Systems	Wafer-level burn-in	NASDAQ US	$58.29	+5.39%	−44.2%	−16.7%	+188.7%	−60.0%	2026-11-02
COHU Cohu	Test handlers and interface	NASDAQ US	$50.14	+4.55%	−25.2%	+18.1%	+115.5%	−32.2%	2026-10-28

Auto-updated